Bit Serial Arithmetic In Dsp

A digital signal processor (DSP) is a specialized microprocessor (or a SIP block), with its architecture optimized for the operational needs of digital signal processing. [1] [2] The goal of DSP is usually to measure, filter or compress continuous real-world analog signals.

• Part of the book series (SECS, volume 316) Abstract Digital signal processing (DSP) is used in a wide range of applications such as speech, telephone, mobile radio, satellite communications, biomedical, image, video, radar and sonar. Different applications of signal processing impose different constraints on hardware architectures. This book is concerned with design of real-time architectures where signal samples are processed as soon as these are received from the signal source.

Bit Serial Arithmetic In Dsp

This is in contrast with batch-mode processing where signal samples are first stored in buffers and then processed in batch. Real-time DSP architectures are designed to match the hardware speed to the application sample speed.

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Since different real-time applications require different sample rates, a DSP algorithm needs to be implemented in different styles for various applications. Thus, design of real-time architectures for these applications requires study of families of architectures.

Custom Designed Digital Signal Processors Using Bit-Serial Arithmetic LU ( ) • Abstract This thesis presents two prime contributions. First, digital filters for both intermediate and base band filtering for mobile communication are presented. Second, a local clock for on-chip clock generation is introduced. The intermediate frequency filter is a digital alternative to today's analog filters.

It is a narrow band filter designed for the American digital mobile telephone system according to the IS-54 specification. The digital base band filters are designed for use in some wide band research systems. Both the narrow band and the wide band filters use a wave digital lattice structure realized with bit-serial arithmetic.

The clock generator is developed to increase the throughput in bit-serial designs such as the intermediate. This thesis presents two prime contributions. First, digital filters for both intermediate and base band filtering for mobile communication are presented. Second, a local clock for on-chip clock generation is introduced. The intermediate frequency filter is a digital alternative to today's analog filters. It is a narrow band filter designed for the American digital mobile telephone system according to the IS-54 specification. The digital base band filters are designed for use in some wide band research systems.